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650 khz /1.3 mhz, 4 a, step - up, pwm, dc - to - dc switching converter data sheet adp1614 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its u se, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. features adjustable c urrent limit , up to 4 a 2.5 v to 5.5 v input voltage range 650 khz or 1. 3 m hz fixed frequency option adjustable output voltage , up to 2 0 v adjustable soft start u ndervoltage lockout thermal s hutdown 3 mm 3 mm, 10 - lead lfcsp suppor ted by adisimpower design tool applications tft lcd bias supplies portable applications industrial/instrumentation equipment general description the adp1614 is a step - up , dc - to - dc switching con verter with an integrated power switch capable of providing an output voltage as high as 2 0 v. the adp1614 is availa ble with a pin - adjustable current limit that is set via an external resistor . t he boost switching frequency is fixed to either 650 khz or 1.3 mhz. with a package height of 0 .8 mm, the adp1614 is optimal for space constrained applications , such as portable devices or thin film transistor (tft) liquid crystal displays (lcds). the adp1614 operate s in current - mode pulse - width m odulation (pwm) with up to 94% efficiency. adjustable soft start prevents inrush currents when the part is enabled. the pwm current - mode architecture allo w s excellent transient response, easy noise filtering, and the use of small, cost - saving external inductors and capacitors. other key features include undervoltage lockout (uvlo), thermal shutdown (tsd), and logic controlled enable. the adp1614 is available in a pb - free , 10- le ad lead frame chip scale package ( lfcsp ) . typical application s circuit adp1614 8 3 9 10 6 2 1 vin en clres ss sw 7 sw fb comp on off 5 gnd 4 gnd 11 ep v out v in l1 c in c ss c out c comp r comp r cl r1 r2 d1 10293-001 figure 1 . step - up regulator configuration
adp1614 data sheet rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 typical applications circuit ............................................................ 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 theory of operation ...................................................................... 10 current - mode pwm operation .............................................. 11 adjustable current limit .......................................................... 11 freq uency selection ................................................................... 11 soft start ...................................................................................... 11 thermal shutdown (tsd) ........................................................ 11 under voltage lockout (uvlo) ............................................... 11 shutdown mode ......................................................................... 11 applications information .............................................................. 12 adisimpower design tool ....................................................... 12 setting the output voltage ........................................................ 12 inductor selection ...................................................................... 12 choosing the input and output capacitors ........................... 13 diode selection ........................................................................... 13 loop compensation .................................................................. 13 soft start capacitor .................................................................... 14 pcb layout guidelines .................................................................. 15 outline dimensions ....................................................................... 16 ordering guide .......................................................................... 16 revision history 6 /1 2 revision 0: initial version
data sheet adp1614 rev. 0 | page 3 of 16 specifications v in = 3.6 v, unless otherwise noted. min imum and max imum values are guaranteed for t j = ?40 c to + 125 c. typical values specified are at t j = 25 c. all limits at temperatur e extremes are guaranteed by correlation and characterization using standard statistical quality control (sqc), unless otherwise noted. table 1 . parameter symbol test conditions /comments min typ max unit supply input voltage v in 2.5 5.5 v quiescent current shutdown i qshdn v en = 0 v 0.25 1.5 a nonswitching state i q v fb = 1.3 v, f sw = 1.3 mhz and 650 khz 7 00 1100 a switching state 1 i qsw f sw = 1.3 mhz , no load 5.5 7 ma f sw = 650 khz , no load 3 4 .5 ma enable pin bias current i en v en = 3.6 v 3. 4 7 a undervoltage lockout (uvlo) undervoltage lockout threshold v in rising 2.33 2.5 v v in falling 2.0 2. 20 v output output voltage v out v in 20 v load regulation v out = 10 v, i load = 1 ma to 1 a 0.0 05 mv/ma reference feedback voltage v fb ? 1.6 % 1.2 4 5 +1.6 % v line regulation v in = 2.5 v to 5.5 v 0.02 0.2 %/v error amplifier transconductance g mea i = 4 a 150 a/v voltage gain a v 80 db fb pin bias current v fb = 1. 245 v 1 50 na switch (sw) on resistance r dson i sw = 1.0 a 50 100 m? leakage current v sw = 20 v 0. 1 10 a peak current li mit 2 r cl = 154 k? , duty cycle = 70% 0.95 1.3 1.65 a maximum peak current limit 3 r cl = 61.9 k?, v in = 3.6 v, v out = 15 v 4 a clres v o lta ge 4 i clres = 5 a 1.2 25 1.27 1.3 15 v i clres = 20 a 1.1 8 1.2 2 1.2 5 v oscillator oscillator frequency f sw adp16 14acpz - 1.3-r7 1.1 1.3 1.4 mhz adp1614acpz - 650 - r7 500 650 720 khz maximum duty cycle d max comp = open, v fb = 1 v, f sw = 1.3 mhz and 650 khz 88 92 % en logic threshold v in = 2.5 v to 5.5 v input voltage low v il 0.3 v input voltage high v ih 1.6 v soft start (ss) charging current i ss v ss = 0 v 3. 4 5 .5 7 a pin voltage v ss v fb = 1.3 v 1.17 1.2 3 1.29 v thermal shutdown thermal shutdown threshold 150 c thermal shutdown hysteresis 20 c 1 this parameter specifies the average current when the device switch es internally with the sw pins (pin 6 and pin 7 ) floating. 2 current limit is a function of duty cycle. for the adjustable current limit versions, it is also a function of the resistor o n the clres pin. see figure 9 through figure 12. 3 guaranteed by design. 4 the clres pin cannot be controlled with a current source. an equivalent resistance should be used.
adp1614 data sheet rev. 0 | page 4 of 16 absolute maximum rat ings table 2 . parameter rating vin, en , fb to gnd ? 0.3 v to + 6 v clres to gnd ?0.3 v to vin comp to gnd 1.0 v to 1.6 v ss to gnd ? 0.3 v to + 1.3 v sw to gnd 2 1 v operating junction temperature range ?40c to +125c storage temp erature range ?65c to + 150c soldering condition s jedec j - std - 020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any oth er conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not i n combination. thermal resistance the j unction - to - ambient thermal resistance ( ja ) of the package is specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. the ja is highly dependent on the applic a tion and board layout. in application s where high maximum power dissipation exists, attention to thermal board design is required. the value of ja may vary, depending on the printed circuit board ( pcb ) mater i al, layout, and environmental conditions. the boundary conditions for the thermal re sistance of the adp1614 are m odeled under natural convection cooling at 25c ambient temperature, jesd 51 - 9 , and 1 w power input on a 4 - layer board. table 3 . thermal resistance 1 package type ja jc unit 10 - lead lfcsp 47 7.22 c/w 1 thermal numbers per jedec standard jesd 51 - 9 . esd caution
data sheet adp1614 rev. 0 | page 5 of 16 pin configuration an d function descripti ons 1 comp 2 fb 3 en 4 gnd 5 gnd 10 ss 9 clres 8 vin 7 sw 6 sw adp1614 top view (not to scale) notes 1. the exposed pad is not electrically connected; connect this pad to a ground plane for better heat distribution. 10293-002 figure 2. pin configuration table 4 . pin funct ion descriptions pin o. nemonic description 1 comp compensation input . connect a series resistor - capacitor network from comp to gnd to compensate the regul a tor. 2 fb output voltage feedback input . connect a resistive voltage divider from the outp ut voltage to fb to set the regulator output voltage. 3 en enable input . drive en low to shut down the regulator; drive en high to turn on t he regulator . 4, 5 gnd ground. 6, 7 sw switching output . connect the power inductor from the input voltage t o sw and connect the external rectifier from sw to the output voltage to complete the step - up converter. 8 vin main power supply input . vin powers the adp1614 internal circuitry. connect vin to the input sour ce voltage. bypass vin to gnd with a 10 f or greater capacitor as close to the adp1614 as possible. 9 clr es connect a resistor to gnd to set the peak inductor current. 10 ss soft start . a capacitor connec ted from ss to gnd brings up the output s lowly at power - up and reduce s in rush current. 11 ep expose d die attach pad . the exposed pad is not electrically connected; c onnect this pad to a ground plane for better heat distribution.
adp1614 data sheet rev. 0 | page 6 of 16 typical performance ch aracteristics 1 10 100 1k 10k efficiency (%) load current (ma) 0 10 20 30 40 50 60 70 80 90 100 v in = 3.6v f sw = 650khz r cl = 71.5k v out = 5v v out = 10v v out = 15v 10293-003 figure 3. efficiency vs. load current, v in = 3. 6 v, f sw = 650 khz 1 10 100 1k 10k efficiency (%) load current (ma) 0 10 20 30 40 50 60 70 80 90 100 v in = 3.6v f sw = 1.3mhz r cl = 71.5k v out = 5v v out = 10v v out = 15v 10293-004 figure 4. efficiency vs. load current, v in = 3. 6 v, f sw = 1.3 mhz 1 10 100 1k 10k efficiency (%) load current (ma) 0 10 20 30 40 50 60 70 80 90 100 v in = 5v f sw = 650khz r cl = 71.5k v out = 10v v out = 15v v out = 20v 10293-005 figure 5. efficiency vs . load current, v in = 5 v, f sw = 650 khz 1 10 100 1k 10k efficiency (%) load current (ma) 0 10 20 30 40 50 60 70 80 90 100 v in = 5v f sw = 1.3mhz r cl = 71.5k v out = 10v v out = 15v v out = 20v 10293-006 figure 6. efficiency vs. load current, v in = 5 v, f sw = 1.3 mhz 4.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 60 75 90 105 120 135 150 maximum output current (a) r cl (k?) 10293-100 v out = 5v v in = 2.5v v in = 3.5v v in = 4.5v figure 7. typical maximum continuous output current vs. r cl , v out = 5 v 1.4 0 0.2 0.4 0.6 0.8 1.0 1.2 60 75 90 105 120 135 150 maximum output current (a) r cl (k?) 10293-101 v out = 15v v in = 2.5v v in = 3.5v v in = 4.5v v in = 5.5v figure 8. ty pical maximum continuous output current vs. r cl , v out = 15 v
data sheet adp1614 rev. 0 | page 7 of 16 4.0 1.0 1.5 2.0 2.5 3.0 3.5 60 75 90 105 120 135 150 current limit (a) r cl (k?) 10293-104 v out = 5v v in = 2.5v v in = 3.5v v in = 4.5v figure 9 . peak c urrent limit of switch vs . r cl , v out = 5 v 3.90 3.85 3.80 3.75 3.70 3.65 3.60 2.5 3.0 3.5 4.0 4.5 current limit (a) input voltage (v) 10293-102 v out = 5v r cl = 71.5k ? t a = ?40c t a = +25c t a = +85c figure 10 . peak cur rent limit of switch vs. v in over tempe rature, v out = 5 v 4.0 3.5 3.0 2.5 2.0 1.5 1.0 60 75 90 105 120 135 150 current limit (a) r cl (k?) 10293-105 v out = 15v v in = 2.5v v in = 3.5v v in = 4.5v v in = 5.5v figure 11 . peak current limit of switch vs . r cl , v out = 15 v 3.60 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 2.5 3.0 3.5 4.0 5.5 4.0 4.5 current limit (a) input voltage (v) 10293-103 t a = +85c t a = ?40c t a = +25c v out = 15v r cl = 71.5k ? figure 12 . peak current limit of switch vs. v in over temperature, v out = 15 v 2.5 5.5 5.0 4.5 4.0 3.5 3.0 switch on resistance (m?) input voltage (v) 30 40 50 60 70 80 i sw = 1a t a = +125c t a = +25c t a = ?40c 10293-008 figure 13 . switch on resistance vs. input voltage 2.5 5.5 5.0 4.5 4.0 3.5 3.0 maximum duty cycle (%) input voltage (v) t a = +25c t a = ?40c t a = +125c 91.0 91.5 92.0 92.5 93.0 93.5 94.0 94.5 10293-015 figure 14 . maximum duty cycle vs. input voltag e
adp1614 data sheet rev. 0 | page 8 of 16 2.5 5.5 5.0 4.5 4.0 3.5 3.0 nonswitching quiescent current (a) input voltage (v) t a = +125c t a = +25c t a = ?40c 580 600 620 640 660 680 700 720 740 760 780 10293-009 figure 15 . nonswitching quie scent current vs. input voltage 2.5 5.5 5.0 4.5 4.0 3.5 3.0 switching quiescent current (ma) input voltage (v) t a = +125c t a = +25c t a = ?40c 2.0 4.5 4.0 3.5 3.0 2.5 f sw = 650khz 10293-011 figure 16 . switching quiescent current vs. input v oltage, f sw = 650 khz 2.5 5.5 5.0 4.5 4.0 3.5 3.0 switching quiescent current (ma) input voltage (v) t a = +25c t a = ?40c 3 9 8 7 6 5 4 f sw = 1.3mhz t a = +125c 10293-012 figure 17 . switching quiescent current vs. input volta ge , f sw = 1.3 m hz en pin current (a) en pin voltage (v) t a = +25c t a = ?40c t a = +125c 0 1 2 3 4 5 6 7 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 10293-016 figure 18 . en pin current vs. en pin voltage ss pin current (a) temperature (c) 4.8 5.0 5.2 5.4 5.6 5.8 6.0 ?40 ?10 20 50 80 110 v in = 5.5v v in = 3.6v v in = 2.5v 10293-017 figure 19 . ss pin current vs. temperature 10293-106 time (4ms/div) 1 2 3 4 v in = 3.6v v out = 15v i load = 60 c ss = 68nf f sw = 1.3mhz output voltage (5v/div) inductor current (500ma/div) switch voltage (10v/div) en pin voltage (5v/div) figure 20 . startu p, c ss = 68 nf
data sheet adp1614 rev. 0 | page 9 of 16 10293-020 time (200s/div) 1 3 load current (50ma/div) output voltage (100mv/div) ac-coupled v in = 3.6v v out = 5v f sw = 650khz l = 4.7h figure 21 . 50 ma to 150 ma load transient , v in = 3.6 v, v out = 5 v, f sw = 650 khz 10293-021 time (200s/div) 1 3 load current (50ma/div) output voltage (100mv/div) ac-coupled v in = 3.6v v out = 5v f sw = 1.3mhz l = 4.7h figure 22 . 5 0 ma to 150 ma load transient , v in = 3.6 v, v out = 5 v, f sw = 1.3 mhz 10293-022 time (200s/div) 1 3 load current (50ma/div) output voltage (100mv/div) ac-coupled v in = 5v v out = 15v f sw = 650khz l = 15h figure 23 . 50 ma to 150 ma load transient, v in = 5 v, v out = 15 v, f sw = 650 khz 10293-023 time (200s/div) 1 3 load current (50ma/div) output voltage (200mv/div) ac-coupled v in = 5v v out = 15v f sw = 1.3mhz l = 10h figure 24 . 50 ma to 150 ma load transient , v in = 5 v , v out = 1 5 v, f sw = 1.3 mhz
adp1614 data sheet rev. 0 | page 10 of 16 theory of operation the adp1614 current - mode , step - up switching co n verter boosts a 2.5 v to 5.5 v input voltage to an output voltage as high as 2 0 v. the internal switc h allows a h igh output current, and the 650 khz/1.3 mhz switching fr e quency allows the use of tiny external components. the switch current is monitored on a pulse - by - pulse basis to limit the current to the value set by the r cl resistor on the clres pin. sw pwm comparator uvlo comparator tsd comparator oscillator s r q d comparator d ref + + vin vin current sensing driver band gap n1 bg reset 1.1m? agnd v in uvlo ref t sense t ref error amplifier v bg 2 1 5.5a v ss r comp c comp comp ss fb c ss r1 r2 r cl c in v out 8 l1 d1 a v out c out 6 sw 7 3 9 5 gnd 4 gnd 11 ep agnd en clres adp1614 10 v in >1.6v <0.3v soft start 10293-024 figure 25 . block diagram with step - up regulator application circuit
data sheet adp1614 rev. 0 | page 11 of 16 current - mode pwm operation the adp1614 utilize s a current - mode pwm control scheme to regulate the output voltage over all load conditions. the output voltage is monitored at fb through a resistive voltage divider. the voltage at fb is compared with the internal 1.2 4 5 v reference by the internal transconductance error amplifier to create an error voltage at comp. the current of the switch is internally measured an d added to the stabilizing ramp. t he resulting sum is compared with the error voltage at comp to control the pwm modulator. this current - mode regulation system allows fast transient response while maintaining a stable output voltage. by selecting the proper resistor - capacitor network from comp to gnd, the regulator response is optimized for a wide range of input voltages, output voltages, and load conditions. adjustable current l imit a key feature of t he adp1614 is a pin - adjustable peak current limit of up to 4 a (see figure 9 to figure 12 and figure 26 ). t his adjustable current limit allows the other external components to be selected specifically for the application . the current limit is set via an external resistor c onnected from pin 9 ( clres ) to ground. 60 150 135 120 105 90 75 current limit (a) r cl (k?) 1.0 4.0 3.5 3.0 2.5 2.0 1.5 v in = 3.5v 10293-007 v out = 15v v out = 5v figure 26 . peak current limit of switch vs. r cl frequency selection t he adp1614 is internally programmed to operate at either 650 khz or 1.3 mhz. operation of the adp1614 at 650 khz ( ad p1614acpz - 650- r7 ) optimizes the efficiency of the device , whereas operation of the adp1614 at 1.3 mhz (adp1614acpz - 1.3 - r7) enables the device to be used with smaller external components. soft start to pre ve nt input inrush current to the converter when the part is enabled , connect a capacitor from ss to gnd to set the soft start period. after the adp1614 is turned on, ss sources 5 a ( typical ) to the soft start capa citor (c ss ) until it reaches 1.2 3 v at start up. as the soft start capacitor charges, it limits the peak current allowed by the part. by slowly charging the soft start capacitor, the input current ramps slowly to prevent it from ov e r shooting excessively at start up. when the adp1614 is disabled, the ss pin is internally shorted to gnd to discharge the soft start capacitor. t hermal shutdown (tsd) the adp1614 include s tsd protection . if the die temperature exceeds 150 c ( typical ) , tsd turn s off the nmos power device, significantly reducing power dissipation in the device and prevent ing output voltage regulation. the nmos power device remain s off until the die temperat ure is reduce d to 1 3 0 c ( typical ) . the soft start capacitor is discharged during tsd to ensure low output voltage overshoot and inrush cu r rents when regulation resumes. undervoltage lockout (uvlo) if the input voltage is below the uvlo threshold, the adp1614 automatic ally turn s off the power switch and place s the part into a low power consumption mode. this prevents potentially erratic operation at low input voltages and prevents the power device from turning o n when the control circuitry cannot operate it. the uvlo levels have ~ 100 mv of hysteresis to ensure glitch - free startup. shutdown mode the en pin turns the adp1614 regulator on or off. drive e n low to shut d own the regulator and reduce the input current to 0. 25 a ( typical ) . drive en h igh to turn on the regulator. when the converter is in shut down mode ( en 0.3 v), there is a dc path from the input to the output through the inductor and output rectifier. th is causes the output voltage to remain slightly below the input voltage by the forward voltage of the rectifier, preventing the output voltage from dropping to grou nd when the regulator is shut down. regardless of the state of the en pin, when a voltage i s app lied to the vin pin , a large current spike occurs due to the non i solated path through the inductor and diode between v in and v out . the high current is a result of the output capacitor charging. the peak value is dependent on the inductor, output capac itor, and any load active on the output of the regulator.
adp1614 data sheet rev. 0 | page 12 of 16 applications information adi sim p ower design tool the adp1614 is supported by the adisimpower ? design toolset. adisimpower is a collection of tools that produce complete power designs that are optimized for a specific design goal. the tools enable the user to generate a full schematic and bill of materials and to calculate performance in minutes. adisimpower can optimize designs for cost, area, effici ency, and parts count while taking into consideration the operating conditions and limitations of the ic and the external components . for more information about the adisimpower design tools, visit www.analo g.com/adisimpower . the tool set is available from this website, and users can request an unpopulated board. setting the output v oltage the adp1614 feature s an adjustable output voltage range of v in to 2 0 v. th e output voltage is set by the resistor voltage divider , r1 and r2 (see figure 25) , from the output voltage (v out ) to the 1.24 5 v feedback input at fb. use the follo w ing equation to determine the output voltage: v out = 1.24 5 (1 + r1 / r2 ) (1) choose r1 based on the following equation : ? ? ? ? ? ? ? = 245 . 1 245 . 1 out v r2 r1 (2) inductor selection the inductor is an essential part of the step - up switching co n verter. it stores energy during the on time of the power switch and transfers that energ y to the output through the output re c tifier during the off time. to balance the trade - off s between small inductor current ripple and efficiency, induc - tance values in the range of 4.7 h to 22 h are recommended. in general, lower inductance valu es have h igher saturation current and lower series resistance for a given phys ical size. however, lower induc tance values result in highe r peak current , which can lead to reduced efficiency and greater input and/or output ripple and noise. a peak - to - peak inductor r ipple current close to 30% of the maximum dc input current typically yields an optimal compromise. for determining the inductor ripple current in continuous o p eration, the input (v in ) and output (v out ) voltages determine the switch duty cycle (d) as follow s: out in out v v v d ? = (3) t he duty cycle and swi tching frequency ( f sw ) can be used to determine the on time: sw on f d t = (4) the inductor ripple current ( ? i l ) in steady state is calculated by l t v i on in l = ? (5) solve for the ind uctance value ( l ) as follows : l on in i t v l ? = (6) en sure that the peak inductor current (the maximum input current plus half the inductor ripple current) is below the rated saturation current of the inductor. likewise, make sure that the maximum ra ted rms current of the inductor is greater than the maximum dc input current to the regulator. fo r continuous current - mode ( ccm ) duty cycles greater than 50% that occur with input voltages less than on e - ha lf the output voltage, slope compens a tion is requir ed to maintain stability of the current - mode regulator. for stable current - mode operation, ensure that the selected inductance is equal to or greater than the minimum ca l culated inductance, l min , for the application parameters in the following equation : sw in out min f v v l l ? = > 8 ) 2 ( (7) inductors smaller than the 4.7 h to 22 h recommended range can be used as long as equation 7 is satisfied for the given application. for input/output combinations that approach the 90% maximum duty cycle, doubling the inductor i s recom - mended to ensure stable operation. table 5 suggests a series of inductors for use with the adp1614 . table 5 . suggested inductors manufacturer part se ries coilcraft xal40xx, xal50xx, xal6060, do3316p toko inc. fdv06xx, dg6045c, fdsd0630, dem8045c, fdve1040 wrth elektr o nik we - hci, we - tpc, we - pd, we - pd2, we - pdf vishay dale ihlp - 2020, ihlp - 2525, ihlp - 3232, ihlp - 4040 tdk components sp m6530, vlp8040, vlf10040, vlf10045 taiyo yuden nrs8030, nrs8040
data sheet adp1614 rev. 0 | page 13 of 16 choosing the input a nd output capacitors the adp1614 require s input and output bypass capacitors to supply transient currents while maintaining constant inpu t and output voltage s . use low equivalent series resistance (esr ) capacitor s of 10 f or greater to prevent noise at the adp1614 input. place the capacitor between vin and gnd , as close as possible to the adp1614 . ceramic capacitors are preferable because of their low esr chara c teristics. alternatively, use a high value, medium esr capacitor in parallel with a 0.1 f low esr capacitor , placed as close as possible to the adp1614 . the output capacitor maintains the output voltage and supplies current to the load while the adp1614 switch is on. the value and characteristics o f the output capacitor greatly affect the output voltage ripple and stability of the regulator. a low esr ceramic dielectric capacitor is prefer able . the output voltage ripple ( ? v out ) is calculated as follows : out on out out c out c t i c q v = = ? (8) where: q c is the c harge removed from the capacitor. c out is the output capacitance. i out i s the output load current . t on is the on time of the switch. the on time of the switch is determined as follows: sw on f d t = (9) the input (v in ) and output (v out ) voltages determine the switch duty cycle (d) as follows: out in out v v v d ? = (10) choose the output capacitor based on the following equation: out out sw in out out out v v f v v i c ? ? ) ( (11) multilayer c eramic capacitors are recommended for this appl i cation. diode selection the o utput rectifier conducts the inductor current to the output capacitor and load while the switch is off. for high efficiency, minimize the forward voltage drop of the diode. for this reason, using schottky rectifiers is recommended. however, for high voltag e, high temperature applications, where the schottky rectifier reverse leakage current becomes significant and can degrade eff i ciency, use an ultrafast junction diode. many diode manufacturers derate the current capability of the diode as a function of th e duty cycle. verify that the output diode is rated to handle the average output load current with the mini mum duty cycle. the minimum duty cycle in ccm of the adp1614 is out max in out min v v v d ) ( ? = (12) where v in(max) is the maximum input voltage. the following are suggested schottky diode manufacturers: ? on semiconductor ? diodes, inc. ? toshiba ? rohm semiconductor loop compensation the adp1614 use s external components to compe n sate the regulator loop, allowing optimization of the loop dynamics for a given application. the step - up converter produces an undesirabl e right - half plane zero in the regulation feedbac k loop. this requires compensat ing the regulator such that th e crossover frequency occurs well b e low the frequency of the right - half plane zero. the right - half plane zero is determined by the following equation: l r v v rhp f load out in z ? ? ? ? ? ? ? ? = 2 ) ( 2 (13) where: f z (rhp) is the right - half plane zero. r load is the equivalent load re sistance or the output voltage d i vided by the load current. to stabilize the regulator, en sure that the regulator crossover frequency is less than or equal to one - fi fth of the right - half plane zero . the regulator loop gain is out cs comp out mea out in out fb vl z g z r g v v v v a = (14) w here: a vl is the loop gain. v fb is the feedback regulation voltage, 1.24 5 v. v out is the regulated output voltage. v in is the input voltage. g mea is the error amplifier transconductance gain. r out = 67 m?. z comp is the impedance of the series rc network fr om comp to gnd. g cs is the current sense transconductance gain (the inductor current divided by the voltage at comp), which is internally set by the adp1614 . z out is the impedance of the load in parallel wit h the output capacitor.
adp1614 data sheet rev. 0 | page 14 of 16 to determine the crossover frequency, it is important to note that at the crossover frequency the compensation impedance (z comp ) is dominated by a resistor, and the output impedance (z out ) is dominated by the impedance of an output capacitor. therefore , when solving for the crossover frequency, the equation (by defi - nition of the crossover frequency) is simplified to 1 2 1 = = out c cs comp mea out in out fb vl c f g r g v v v v a (15) where: r comp is the compensation resistor. f c is the crossover frequency. solv e for r co mp as follows: cs mea in fb out out c comp g g v v v c f r = 2 ) ( 2 (16) w here: v fb = 1.2 4 5 v . g mea = 150 a/v . g cs = 7 a/v . therefore, in out out c comp v v c f r 2 ) ( 4806 = (17) after the compensation resistor is known, set the zero formed by the compensation capacitor and resistor to o ne - fou rth o f the crossover frequency, or comp c comp r f c = 2 (18) where c comp is the compensation capacitor. r com p c com p c2 1 com p g m error amplifier 2 fb v bg 10293-026 figure 27 . compensation components capacitor c2 is chosen to cancel th e zero introduced by the esr of the output capacit or . sol v e for c2 as follows: comp out r c esr c2 = (19) if a low esr, ceramic output capacitor is used for c out , c2 is optional. for optimal transient performance, r comp and c comp might need to be adjusted by observing the load transient response of the adp1614 . for most appl i cations, the compensation resistor should be with in the range of 1 k? to 1 00 k? , and the compen - sa tion capacitor should be with in the range of 100 pf to 10 n f. soft start capacitor upon startup ( en 1.6 v) or fault recovery , the voltage at ss ramps up slowly by charging the soft start capacitor (c ss ) with an internal 5 .5 a cu r rent source (i ss ) . as the soft start capacitor charges, it limits the peak current allowed by the part to prevent e xces sive overshoot at startup. use the following equation to determine t he necessary value of the soft start capacitor ( c ss ) for a specific overshoot and start - up time when the part is at the current limit with maximum loa d: ss ss ss v t i c ? = (20 ) where: i ss = 5 .5 a (typical) . t is the start - up time at the current limit . v ss = 1.2 3 v (typical) . if the applied load does not place the part at the current limit, the value of c ss can be reduced . a 68 nf s oft start capacitor results in negligible i nput current oversho ot at start up and , therefore , is suitable for most applications. i f an unusually large output capacitor is used, a longer soft start period is required to pr e vent input inrush current. however , if fast startup is require d , the soft start capac i tor can be reduc ed or removed, whic h allow s the adp1614 to start quickly but with greater peak switch current .
data sheet adp1614 rev. 0 | page 15 of 16 pcb layout guidelines for high efficiency, good regulation, and stability, a well designed pcb layout is r equired. use the following guidelines when designing pcbs (see figure 25 for a block diagram and figure 2 for a pin configuration). ? keep the low e sr in put capac itor ( c in ), which is labeled as c4 in figure 28, close to vin and gnd. this minimizes noise i n jected into the part from board parasitic inductance. ? keep the high current path from c in through the l1 inductor to sw and gnd as s hort as possible. ? keep the high current path from vin through the inductor (l1), the re c tifier (d1) , and the output ca pacitor ( c out ), which is l abeled as c 7 in figure 28, as short as possible. ? keep high current traces as short and as wide as possible. ? place the feedback resistors as close to fb as possible to prevent noise pickup. connect the ground of the feedback network directly to an agnd plane that makes a kelvin connection to the gnd pin. ? place the compensation components as close as possible to comp. connect the ground of the compensation network directly to an agnd plane that makes a kelvin connection to the gnd pin. ? connect the soft start capacitor ( c ss ), which is label ed as c 1 in figure 28, as close as possible to the device. connect the ground of the soft start capacitor to an agnd plane that makes a kelvin connection to the gnd pin. ? connect the current limit set resistor (r cl ), which is labeled as r4 in figure 28 , as close as possible to the device. connect the ground of the cl resistor to an agnd plane that makes a kelvin connection to the gnd pin. ? the pcb must be properly designed to conduct the heat away from the package. this is achieved by adding thermal vias to the pcb, which provide a thermal path to the inner or bottom layers. thermal vias should be placed on the pcb underneath the exposed pad of the lfcsp and in the gnd plane around the adp1614 package to impr ove thermal performance of the package. avoid routing high imp edance traces from the compensa tion and feedback resistors near any node connected to sw or n e ar the inductor to prevent radiated noise injection. 10293-027 figure 28 . adp1614 recommended top layer layout for boost application 10293-028 figure 29 . adp1614 recommended bottom layer layout for boost application
adp1614 data sheet rev. 0 | page 16 of 16 outline d imensions 2.48 2.38 2.23 0.50 0.40 0.30 121009-a t op view 1 0 1 6 5 0.30 0.25 0.20 b o t t o m v i e w pin 1 index area sea ting plane 0.80 0.75 0.70 1.74 1.64 1.49 0.20 ref 0.05 max 0.02 nom 0.50 bsc e x p o s e d p a d 3.10 3.00 sq 2.90 pin 1 indica t or (r 0.15) for proper connection of the exposed pad, refer to the pin configuration and function descriptions secti on of this data sheet. figure 30 . 10 - lead lead frame chip scale package [ lfcsp_wd ] 3 mm 3 mm body, very very thin , dual lead (cp - 10 - 9) dimensions shown in millimeters ordering guide model 1 temperature range switching frequency package des cription package option branding adp1614acpz - 1.3 - r7 ?40c to +125c 1.3 mhz 10 - lead lead frame chip scale package [lfcsp_wd] cp - 10 - 9 lm4 adp1614acpz - 650-r7 ?40c to +125c 650 khz 10- lead lead frame chip scale package [lfcsp_wd] cp -10-9 lm5 adp1614 - 1.3- evalz 1.3 mhz evaluation board, 15 v output voltage configuration adp1614 - 650- evalz 650 khz evaluation board, 5 v output voltage configuration 1 z = rohs compliant part. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10293 - 0 - 6/12(0)

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